Baya Systems is inspired by the baya bird, also known as the weaver. Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient. Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems. This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets. We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services! Senior Technical Writer Locations: UK, Remote Europe We are seeking a Senior Technical Writer to create comprehensive hardware documentation for our next-generation, high-performance chip interconnect fabric Intellectual Property (IP). Role Overview You will bridge the gap between complex silicon architecture and hardware engineering customers. You will translate RTL designs, microarchitecture specifications, and configuration registers into clear, actionable technical manuals. This role requires close collaboration with design, verification, and systems engineering teams in a fast-paced startup environment. Key Responsibilities: Create Technical Manuals: Write architecture specifications, integration guides, and data sheets. Document Register Maps: Author detailed register descriptions and memory map definitions. Develop User Guides: Produce step-by-step guides for IP configuration, synthesis, and verification. Standardize Documentation: Establish templates, style guides, and documentation release workflows. Edit Engineering Drafts: Refine internal design notes into customer-facing collateral. Manage Version Control: Maintain documentation pipelines tied to hardware RTL release cycles. Required Skills & Qualifications Domain Knowledge: Deep understanding of Network-on-Chip (NoC) or AMBA protocols (AXI, CHI, ACE). Hardware Literacy: Ability to read Verilog/SystemVerilog and understand silicon design flows. Tools Expertise: Proficiency with DITA, XML, Markdown, Sphinx, or FrameMaker. Automation Skills: Experience scripts (Python, Perl) to extract register data from Excel/RAL. Startup Agility: Ability to thrive independently with evolving specifications and tight deadlines. Education: Bachelor’s degree in EE, CS, Technical Writing, or equivalent experience. Experience: 5+ years documenting semiconductor IP or complex SoC architectures. [1] Desired Qualifications Experience with automated doc-from-code pipelines (Git, CI/CD). Familiarity with PCIe, CXL, or CCIX interconnect standards. Knowledge of hardware emulation and verification environments. CHI, AXI, proprietary NoC Sphinx [email protected] Compensation: Salary commensurate with experience Performance incentives Comprehensive medical, dental, and vision benefits 401(k) retirement plan Equity