Note: The job is a remote job and is open to candidates in USA. Ludwig Computing is focused on solving the energy efficiency problem of intelligent compute through innovative hardware and software platforms. They are seeking a Hardware FPGA Engineer to assist in implementing and validating core logics and processing algorithms for advanced computational workloads.

Responsibilities

• Translate architectural concepts into FPGA prototypes
• Design and simulate custom processing modules using Verilog, VHDL, or high-level synthesis (HLS)
• Implement and validate processing components on FPGA platform using industry-standard tools (e.g., Vivado, Quartus, or OpenCL-based flows)
• Benchmark performance and optimize tradeoffs in latency, area, throughput, and memory bandwidth
• Build testbenches, run timing/area analysis, and assist with system integration
• Work collaboratively with system architects, FPGA design engineers, and embedded software engineers
• Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix

Skills

• Experience with FPGA development, RTL or HLS-based design in Verilog/SystemVerilog, VHDL, or C++
• Experience with FPGA development tools (Vivado, Quartus, or equivalent)
• Solid electronic circuit design and electronic systems background
• Expertise of digital logic fundamentals, including pipelining and timing closure
• Digital system partitioning and advanced function implementation in FPGAs
• Experience with memory mapping and hierarchy on FPGA
• Strong skills in simulation, debugging, and synthesis workflows
• B.S. degree or higher in engineering (preferably Electrical Engineering, Computer Science)
• Experience with OpenCL or HLS-based design targeting FPGA
• Experience with hardware/software co-design and system-level integration
• Project experience in digital design, computer architecture, or embedded systems
• Exposure to numerical computing, AI workloads, or custom arithmetic units
• Exposure to ASIC design concepts, such as synthesis, floor planning, or RTL-to-GDS toolchains
• Familiarity with high-speed interfaces
• Familiarity with analog or mixed-signal concepts

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